Keyboard Interrupt Register (Kbd _Int) - Texas Instruments OMAP5910 Technical Reference Manual

MPU I/O
Table 7–20. Keyboard Interrupt Register (KBD _INT)
Bit Name
15–1 Reserved
0 KBD_INT
Note: KBD_INT is a status bit only (duplication of the level of the corresponding interrupt signal).
Table 7–21. GPIO Interrupt Register (GPIO_INT)
Bit Name
15–0 GPIO_INT
Note: GPIO_INT is reset on read access to the GPIO_INT register. The value read is the value after mask application.
Table 7–22. Keyboard Mask Interrupt Register (KBD_ MASKIT)
Bit Name
15–1 Reserved
0 KBD_MASKIT
Table 7–23. GPIO Mask Interrupt Register (GPIO_MASKIT)
Bit Name
15–0 GPIO_MASKIT[15:0]
7-28
Function
Keyboard interrupt (active low)
Function
GPIO interrupts (active high)
Even in emulation mode, the GPIO interrupts are reset by a read in the GPIO
interrupt register (GPIO_INT).
Function
Mask is active at level 1, inactive at level 0
Function
Mask is active at level 1, inactive at level 0
Reset
Value
1
Reset
Value
0
Reset
Value
00
Reset
Value
00