Pulldown Control 2 Register (Pull_Dwn_Ctrl_2) - Texas Instruments OMAP5910 Technical Reference Manual

Table 6–44. Pulldown Control 2 Register (PULL_DWN_CTRL_2)
Bit Name
31 CONF_PDEN_MCBSP2_
DOUT_R
30 CONF_PDEN_MCBSP2_
RSYNC_R
29 CONF_PDEN_MCBSP2_
CLKX_R
28 CONF_PDEN_MCBSP2_
CLKR_R
Note: Unless otherwise indicated, pulldown control for each I/O is forced off at reset while in compatibility mode. The pull-
down control register bits only control the pulldowns while in native mode. Depending upon the pin multiplexing config-
uration of any particular I/O, a pulldown may not be available. Consult Appendix A of this document or the OMAP5910
data manual (literature number SPRS197) to determine whether a pulldown exists for each I/O.
Value Description (See Note)
This bit controls the pulldown enable on the
OMAP5910 I/O, which defaults to
MCBSP2.DX at reset.
0 Pulldown enabled
1 Pulldown disabled
This bit controls the pulldown enable on the
OMAP5910 I/O, which defaults to
MCBSP2.FSR at reset.
0 Pulldown enabled
1 Pulldown disabled
This bit controls the pulldown enable on the
OMAP5910 I/O, which defaults to
MCBSP2.CLKX at reset.
0 Pulldown enabled
1 Pulldown disabled
The control for this pulldown is forced on at
reset and while in compatibility mode.
This bit controls the pulldown enable on the
OMAP5910 I/O, which defaults to
MCBSP2.CLKR at reset.
0 Pulldown enabled
1 Pulldown disabled
OMAP5910 Configuration Registers
R/W
R/W
R/W
R/W
R/W
MPU Private Peripherals
Reset
Value
0x0
0x0
0x0
0x0
6-53