Mcbsp Registers; Mcbsp And Mcsi Memory And Peripheral Mapping - Texas Instruments OMAP5910 Technical Reference Manual

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9.8 McBSP and MCSI Memory and Peripheral Mapping

Table 9–44. McBSP Registers

The base address for each McBSP register map is as follows:

McBSP1 (I2S audio):

0x08C00 (DSP memory map)

E101:1800 (MPU memory map)

McBSP2 (modem interface): FFFB:1000 (MPU memory map)

McBSP3 (optical interface):

0x0B800 (DSP memory map)

E101:7000 (MPU memory map)

Table 9–44 shows the 19 registers accessible on each McBSP. Table 9–44

through Table 9–45 describe register bits.

Data receive register 2

Data receive register 1

Data transmit register 2

Data transmit register 1

Serial port control register 2

Serial port control register 1

Receive control register 2

Receive control register 1

Transmit control register 2

Transmit control register 1

Sample rate generator register 2

Sample rate generator register 1

Multichannel register 2

Multichannel register 1

Receive channel enable register partition A

Receive channel enable register partition B

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