Level-Sensitive Interrupt Clear Commands; Level-Sensitive Clear High Register (Rst_Lvl_Hi) - Texas Instruments OMAP5910 Technical Reference Manual

Table 8–34. Level-Sensitive Clear High Register (RST_LVL_HI) (Continued)
Bit Name
5–0 Reset_CHx
Figure 8–6. Level-Sensitive Interrupt Clear Commands
TIPB Write
transaction
Value Description
Reset CHx if a 1 is written into RST_LVL_LO[x] and
CHx is configured as level-sensitive interrupt, where
CHx corresponds to interrupt channels
nXIRQ[20:16].
0 Do not reset CHx.
1 Reset interrupt channel CHx if level is configured as
level-sensitive.
DO[15:0]
A[15:0]
Address = 1
DSP Interrupt Interface
Clear
assignments
Clear interrupt channel 0
0
Clear interrupt channel 1
1
Clear interrupt channel 2
2
Clear interrupt channel 3
3
Clear interrupt channel 4
4
Clear interrupt channel 5
5
Clear interrupt channel 6
6
Clear interrupt channel 7
7
Clear interrupt channel 8
8
Clear interrupt channel 9
9
Clear interrupt channel 10
10
Clear interrupt channel 11
11
14
Clear interrupt channel 14
Clear interrupt nmi
15
DSP Private Peripherals
Reset
Type
Value
0
8-31