Block Diagram; Microwire Registers; Microwire Interface - Texas Instruments OMAP5910 Technical Reference Manual

MicroWire Interface

7.4 MicroWire Interface
Figure 7–17. Block Diagram
MPUXOR_CK
enable
Setup registers
Control and status
register
TIPB
7.4.1

MicroWire Registers

Table 7–26. MicroWire Registers
Register Description
TDR Transmit data
RDR Receive data
CSR Control and status
SR1 Setup 1
SR2 Setup 2
7-30
This serial synchronous interface can drive two serial external components.
For the external devices, this interface is compatible with the µWire standard
and is seen as the master (see Figure 7–17).
A transmit DMA mode is available.
Clock register
Clock
Clock
divider
Control
UWIRE.CS[3:0]
Start address in the peripheral range (hex): FFFB:3000
Table 7–26 lists the MicroWire registers. Table 7–27 through Table 7–34
describe the individual registers.
DMA_REQ to system DMA_REQ[6:0]
2
Inth lvl2 (2,3) - edge
Transmit data register
logic
Receive data register
UWIRE.SCLK
R/W
W
R
R/W
R/W
R/W
UWIRE.SDO
(16 bits)
UWIRE.SDI
(16 bits)
Size Address
16 bits FFFB:3000
16 bits FFFB:3000
16 bits FFFB:3000
16 bits FFFB:3000
16 bits FFFB:3000
Offset
0x00
0x00
0x04
0x08
0x0C