(Func_Mux_Ctrl3; Omap5910 Configuration Registers - Texas Instruments OMAP5910 Technical Reference Manual

6.8 OMAP5910 Configuration Registers

Table 6–26. Configuration Registers
Register
FUNC_MUX_CTRL_0
FUNC_MUX_CTRL_1
FUNC_MUX_CTRL_2
COMP_MODE_CTRL_0
FUNC_MUX_CTRL_3
FUNC_MUX_CTRL_4
FUNC_MUX_CTRL_5
FUNC_MUX_CTRL_6
FUNC_MUX_CTRL_7
FUNC_MUX_CTRL_8
FUNC_MUX_CTRL_9
FUNC_MUX_CTRL_A
FUNC_MUX_CTRL_B
FUNC_MUX_CTRL_C
FUNC_MUX_CTRL_D
PULL_DWN_CTRL_0
PULL_DWN_CTRL_1
PULL_DWN_CTRL_2
PULL_DWN_CTRL_3
GATE_INH_CTRL_0
VOLTAGE_CTRL_0
TEST_DBG_CTRL_0
MOD_CONF_CTRL_0
Table 6–26 lists the 32-bit read/write configuration registers. Table 6–27
through Table 6–49 describe the register bits. The compatibility mode control
0 register (COMP_MODE_CTRL_0) must be programmed to 0xEAEFh for
any of these configuration registers to exercise their associated control. The
base address for the configuration registers is FFFE:1000.
Description
Functional multiplexing control 0
Functional multiplexing control 1
Functional multiplexing control 2
Compatibility mode control 0
Functional multiplexing control 3
Functional multiplexing control 4
Functional multiplexing control 5
Functional multiplexing control 6
Functional multiplexing control 7
Functional multiplexing control 8
Functional multiplexing control 9
Functional multiplexing control A
Functional multiplexing control B
Functional multiplexing control C
Functional multiplexing control D
Pulldown control 0
Pulldown control 1
Pulldown control 2
Pulldown control 3
Gate and inhibit control 0
Voltage control 0
Test debug control 0
Module configuration control 0
OMAP5910 Configuration Registers
MPU Private Peripherals
Offset
0x00
0x04
0x08
0x0C
0x10
0x14
0x18
0x1C
0x20
0x24
0x28
0x2C
0x30
0x34
0x38
0x40
0x44
0x48
0x4C
0x50
0x60
0x70
0x80
6-27