Mmu Faults And Mpu Aborts - Texas Instruments OMAP5910 Technical Reference Manual

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Translating Large Page References

MMU Faults and MPU Aborts

Figure 2–18 illustrates the complete translation sequence for a 64K-byte large

page. As the upper four bits of the page index and the lower four bits of the

coarse page table index overlap, each coarse page table entry for a large page

descriptor must be duplicated 16 times (in consecutive memory locations). If

the large page is included in a fine page table, the large page descriptor must

be duplicated 64 times.

The MMU generates the following types of faults:

Alignment fault (on data access only)

Translation fault

Domain fault

Permission fault

In addition, an external abort can be raised on certain types of external data

When the MMU is off, the only fault generated is the alignment fault.

The access control mechanism of the MMU detects the conditions that pro-

duce these faults. If a fault is detected as the result of a memory access, the

MMU aborts the access and signals the fault condition to the MPU. The MMU

is also capable of retaining the type and address information of the abort. The

MPU recognizes two types of aborts: data and prefetch aborts. The MMU has

no FAR or FSR registers.

The MMU detects access violations before starting the external memory

access. External aborts do not necessarily inhibit the external access, as

described in Section 3.10, System Operating Details.

MPU instructions are prefetched, so a prefetch abort simply flags the instruc-

tion as it enters the instruction pipeline. An abort does not occur yet, because

a previously fetched instruction could render the rest of the pipe moot. For

example, if a branch instruction executes first or an interrupt occurs, the

instruction that causes the abort never executes. This instruction actually

causes the abort to take place only if it is executed. No abort takes place if the

instruction is not used (when it is branched around).

MPU Memory Management Unit

MPU Subsystem