Functional Multiplexing Control B Register (Func_Mux_Ctrl_B) - Texas Instruments OMAP5910 Technical Reference Manual

Table 6–38. Functional Multiplexing Control A Register (FUNC_MUX_CTRL_A) (Continued)
Bits Name
5–3 CONF_MCSI1_SYNC_R
2–0 CONF_UARTS_CLKIO_R
Table 6–39. Functional Multiplexing Control B Register (FUNC_MUX_CTRL_B)
Bits Name
31–21 RESERVED
20–18 CONF_COM_MCLK_REQ_R
17–15 RESERVED
14–12 CONF_MCSI2_SYNC_R
11–9 CONF_MCSI2_DOUT_R
Description
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to MCSI1.SYNC at
reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to BCLK at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
Description
Reserved for future expansion. These bits must
always be written as 0.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to
UART2.CLKREQ at reset.
The control for this I/O is forced to 000 at reset
and while in compatibility mode.
Reserved for future expansion. These bits must
always be written as 0.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to MCSI2.SYNC
at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
These bits control the multiplexing on the
OMAP5910 I/O, which defaults to MCSI2.DOUT
at reset.
The control for this I/O is forced to 000 at reset
and in compatibility mode.
OMAP5910 Configuration Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MPU Private Peripherals
Reset
Value
0x0
0x0
Reset
Value
0x0
0x0
0x0
0x0
0x0
6-41