Format Of The Lock-Down Registers; Lockdown Operations - Texas Instruments OMAP5910 Technical Reference Manual

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Coprocessor 15

Table 2–12. Lockdown Operations

Read D-TLB lock

Write D-TLB lock

Read I-TLB lock

Write I-TLB lock

Figure 2–7. Format of the Lock-Down Registers

Loading of the TLB is managed by a victim counter, which counts from the pro-

grammed base value up to 63. Therefore, some pages or sections can be

locked inside the TLB if loaded between the entry 0 and the entry pointed to

by the base value register.

Flush operations invalidate both locked and non-locked entries. An entry can

also be maintained in the TLB during a global flush if the preserved bit was set

during the loading of this entry in the TLB. A flush entry operation invalidates

a TLB entry regardless of its state (preserved/unpreserved).

The flush operation does not modify the base value register but reinitializes the

victim counter to the base value.

The following code sequence locks a page/section in entry 3:

{flush page/section from TLB}

MCR p15, 0, Rd, c10, c0, 1

Rd content indicates base value = 4, current victim = 3

MRC p15, 0, Rd, c7, c13, 1

Prefetch I-line with VA in Rd generates a miss TLB that loads entry 3 (victim

counter is automatically updated to 4).

MRC p15, 0, Rd, c10, c0, 0

MCR p15, 0, Rd, c10, c0, 0

MRC p15, 0, Rd, c10, c0, 1

MCR p15, 0, Rd, c10, c0, 1

Current Victim