Rsi Peripheral Id Registers (Rsi_Pidx) - Analog Devices ADSP-BF506F Hardware Reference Manual

Table 21-28. RSI_RD_WAIT_EN Register
Bit Name
0 SDIO_RWR
15:1 Reserved

RSI Peripheral ID Registers (RSI_PIDx)

The
RSI_PIDx
,
RSI_PID4 RSI_PID5
reset and are used to identify the peripheral revision. There are a total of
four 16-bit identification registers of which the lower 8-bits are valid. The
contents of these four registers are listed in
RSI Peripheral ID Registers (RSI_PIDx)
Read
PID0 = 0xFFC0 38D0
PID1 = 0xFFC0 38D4
PID2 = 0xFFC0 38D8
PID3 = 0xFFC0 38DC
15 14 13 12 11 10
0
Reserved
Figure 21-26. RSI Peripheral ID Registers
Table 21-29. RSI_PIDx Registers
Bit Name
7:0 RSI_PID
15:8 Reserved
ADSP-BF50x Blackfin Processor Hardware Reference
Function
RSI read wait request enable
0 = Normal operation
1 = Issue read wait request to SDIO device
Reserved
registers (
RSI_PID0
, , and
RSI_PID6
9 8
0 0 0 0 0 0 0
Function
Peripheral ID
Reserved
Removable Storage Interface
, ,
RSI_PID1 RSI_PID2
) contain a fixed value at
RSI_PID7
Table 21-30.
7 6 5 4 3 2 1
0 0 0 0 0 0 0
Type Default
R/W1A/W 0
RO 0
, ,
RSI_PID3
0
Reset = 0x0000
0
RSI_PID
Type Default
RO 0
RO 0
21-81