Rsi Exception Mask Register (Rsi_Emask) - Analog Devices ADSP-BF506F Hardware Reference Manual

RSI Exception Mask Register (RSI_EMASK)

The
RSI_EMASK
Writing a "1" to the
sponding bit in the
RSI Exception Mask Register (RSI_EMASK)
Read/Write
15 14 13 12 11 10
0xFFC0 38C4
0
Reserved
Figure 21-23. RSI Exception Mask Register
Table 21-26. RSI_EMASK Register
Bit Name
0 Reserved
1 SDIO_INT_DET_MASK
3:2 Reserved
4 SD_CARD_DET_MASK
5 CEATA_INT_DET_MASK
15:6 Reserved
ADSP-BF50x Blackfin Processor Hardware Reference
register contains mask bits for the
bit enables the interrupt for the corre-
RSI_EMASK
register.
RSI_ESTAT
9 8
0 0 0 0 0 0 0
Function
Reserved
SDIO interrupt enable
0 = Interrupt disabled
1 = Interrupt enabled
Reserved
Card detect interrupt enable
0 = Interrupt disabled
1 = Interrupt enabled
Command completion signal
detect enable
0 = Interrupt disabled
1 = Interrupt enabled
Reserved
Removable Storage Interface
RSI_ESTAT
7 6 5 4 3 2 1 0
0 0 0 1 0 0 0 0
status bits.
Reset = 0x0010
Reserved
SDIO_INT_DET_MASK
Reserved
SD_CARD_DET_MASK
CEATA_INT_DET_MASK
Type Default
R/W 0
R/W 0
R/W 0
R/W 0
R/W 0
RO 0
21-77