Interface Overview - Analog Devices ADSP-BF506F Hardware Reference Manual

Adsp-bf50x blackfin processor
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Figure 22-2. ADSP-BF506F – ACM Connections (for Internal ADC)

Interface Overview

The ACM consists of two independent 32-bit timers, 16 event register
pairs, 16 event comparators, and a timing generation unit. The ACM can
accept four external trigger inputs, with the timers set to start counting on
receiving the external triggers based on the mode of the ACM. Each timer
can be independently enabled, and trigger selection can also be indepen-
dent. The two sets of 8 event register pairs (total of 16 event register pairs)
determine the ADC controls and timing for each ADC sampling interval.
Each event register pair consists of an event control register (
an event time register (
event and determines settings for the ADC controls (
, and others) for that particular ADC conversion. The
DIFF
register determines the time offset from the external trigger for each event
sampling at the ADC.
ADSP-BF50x Blackfin Processor Hardware Reference
ADSP-BF506F
DRxSEC
DRxPRI
SPORTx
RCLKx
RFSx
TRIGGER[3:0]
ACLK
CS
ACM
ACM_A[2:0]
ACM_SGLDIFF
ACM_RANGE
RANGE
SGL/DIFF
A[2:0]
ADC
CS
(INTERNAL)
SCLK
D
A
OUT
D
B
OUT
). The
ACM_ETx
ACM_ERx
ADC Control Module (ACM)
SPORT
SELECT
MUX
register enables a particular
[2:0],
A
) and
ACM_ERx
,
RANGE
SGL-
ACM_ETx
22-3

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