Acm Event Control (Acm_Erx) Registers - Analog Devices ADSP-BF506F Hardware Reference Manual

ACM Registers

ACM Event Control (ACM_ERx) Registers

The ACM Event Control registers hold the ADC Control value corre-
sponding to the event. They also have enable bits to selectively enable a
particular event.
ACM Event Control Register (ACM_ERx)
15 14 13 12 11 10
0
EPF4–0 (Event Parameter Field)
EPF2–0 - Settings for ACM_A2–0 pins
(typically for ADC channel select signal)
EPF3 - Setting for ACM_RANGE pin
(typically for ADC range selector)
EPF4 - Setting for ACM_SGLDIFF pin
(typically for ADC single ended/differential selector)
Figure 22-22. ACM Event Control (ACM_ERx) Registers
Enable Event (ENAEV=1)
When the
ENEAV
external trigger) causes a sampling event to occur to the ADC with the
ADC controls selected by the EPF4–0 bit field
Event Parameter Field (EPF4–0)
The bit field selects values for the ADC control pins, which are
EPF4–0
output when the enabled event occurs. Selection of
on the type of ADC, usage mode, and other items.

To prevent incorrect results, the
grammed when an event is active. Program the
providing a trigger, and re-program it after all the events complete
( bit in the
ECOM
22-38
9 8 7
0 0 0 0 0 0 0 0
bit is set (=1), an event (time comparison match or other
ACM_STAT
ADSP-BF50x Blackfin Processor Hardware Reference
6 5 4 3 2 1 0
0 0 0 0 0 0 0
register should not be pro-
ACM_ER
register is set).
Reset = 0x0000
ENAEV (Enable Event)
0 - Disable event
1 - Enable event
values are based
EPFx
before
ACM_ER