Figure 15.9 Slave Transmit Mode Operation Timing 1 - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
Table of Contents

Advertisement

Slave receive mode
SCL
(master output)
SDA
(master output)
SCL
(slave output)
SDA
(slave output)
TDRE
TEND
TRS
ICDRT
ICDRS
ICDRR
User
[2] Write data to ICDRT (data 1),
processing
and clear TDRE.

Figure 15.9 Slave Transmit Mode Operation Timing 1

Rev. 2.00, 05/03, page 608 of 820
Slave transmit mode
9
1
2
Bit 7
Bit 6
A
Data 1
Data 1
[2] Write data to ICDRT (data 2),
3
4
5
6
Bit 5
Bit 4
Bit 3
Bit 2
and clear TDRE.
7
8
9
1
A
Bit 1
Bit 0
Bit 7
Data 2
Data 3
Data 2
[2] Write data to ICDRT (data 3),
and clear TDRE.

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s seriesH8s/2300 series

Table of Contents