Pll Control Register (Pllcr) - Renesas H8S/2368 Series Hardware Manual

Bit Bit Name Initial Value
2 SCK2 0
1 SCK1 0
0 SCK0 0
X: Don't care
21.1.2

PLL Control Register (PLLCR)

PLLCR sets the frequency multiplication factor used by the PLL circuit.
Bit Bit Name
7 —
to
4
3 —
2 —
1 STC1
0 STC0
R/W
R/W
R/W
R/W
Initial Value R/W
0 —
0 R/W
0 R/W
0 R/W
0 R/W
Description
System Clock Select 2 to 0
Select the division ratio.
000: 1/1
001: 1/2
010: 1/4
011: Setting prohibited
100: Setting prohibited
101: Setting prohibited
11X: Setting prohibited
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Reserved
Though this bit can be read from or written to, the
write value should always be 0.
Reserved
This bit is always read as 0 and cannot be
modified.
Frequency Multiplication Factor
The STC bits specify the frequency multiplication
factor used by the PLL circuit.
00: × 1
01: × 2
10: × 4
11: Setting prohibited
Rev. 2.00, 05/03, page 677 of 820