V
IH
SDA0
to
V
IL
SDA1
t
BUF
SCL0
to
SCL1
P*
S*
t
Sf
Note: * S, P, and Sr represent the following conditions:
S: Start condition
P: Stop condition
Sr: Retransmit start condition
Figure 24.39 I
t
SCLH
t
STAH
t
SCLL
t
Sr
t
SCL
t
SDAH
2
C Bus Interface Input/Output Timing (Option)
t
STAS
S
*
r
t
SDAS
Rev. 2.00, 05/03, page 767 of 820
t
t
SP
STOS