Renesas H8S/2368 Series Hardware Manual page 843

MCU
Operating
Port Name Mode
PG4/ 1, 2, 4, 7
BREQO/
CS4
PG3/CS3 1, 2, 4, 7
PG2/CS2
PG1/CS1
PG0/CS0 1, 2
3, 4, 7
Legend:
L: Low level
H: High level
Keep: Input port becomes high-impedance, output port retains state
T: High impedance
DDR: Data direction register
OPE: Output port enable
Notes: Indicates the state after the bus cycle being executed is completed.
* Not supported by the H8S/2366.
Hardware
Standby
Reset Mode
T T
T T
H T
T
Software Bus Release
Standby Mode State
[BREQO [BREQO output]
BREQO
output]
BREQO
[CS output]
[OPE = 0, CS
T
output]
[Other than the
T
above]
[OPE = 1, CS
Keep
output]
H
[Other than the
above]
Keep
[OPE = 0, [CS output]
CS output]
T
T
[Other than the
[OPE = 1,
above]
CS output]
Keep
H
[Other than the
above]
Keep
[OPE = 0, [CS output]
CS output]
T
T
[Other than the
[OPE = 1,
above]
CS output]
Keep
H
[Other than the
above]
Keep
Rev. 2.00, 05/03, page 791 of 820
Program
Execution
State Sleep
Mode
[BREQO
output]
BREQO
[CS output]
CS
[Other than
the above]
I/O port
[CS output]
CS
[Other than
the above]
I/O port
[CS output]
CS
[Other than
the above]
I/O port