• P11/PO9*
1
/TIOCB0/DREQ1*
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR_0, bits IOB3 to IOB0 in TIORH_0, and bits
CCLR2 to CCLR0 in TCR_0), bit NDER9*
TPU channel 0
settings
P11DDR
1
NDER9*
Pin function
Notes: *1 Not supported by the H8S/2366.
*2 TIOCB0 input when MD3 to MD0 = B'0000 and IOB3 to IOB0 = B'10xx.
TPU channel 0
settings
MD3 to MD0
IOB3 to IOB0
B'0000
B'0100
B'1xxx
CCLR2, CCLR0
Output function
x: Don't care
1
(1) in table below
—
—
TIOCB0 output
(2)
(1)
B'0000
B'0001 to
B'0011
B'0101 to
B'0111
—
—
—
Output
compare
output
1
in NDERH, and bit P11DDR.
(2) in table below
0
—
P11 input
P11 output
TIOCB0 input*
DREQ1 input*
1
(2)
(2)
B'0010
—
B'xx00
—
—
—
—
Rev. 2.00, 05/03, page 311 of 820
1
1
0
1
PO9 output*
2
(1)
(2)
B'0011
Other than B'xx00
Other than
B'010
B'010
PWM mode
—
2 output
1