Renesas H8S/2368 Series Hardware Manual page 41

Figure 8.11 DTC Operation Timing
(Example of Block Transfer Mode, with Block Size of 2) ...................................291
Figure 8.12 DTC Operation Timing (Example of Chain Transfer)...........................................291
Figure 8.13 Chain Transfer when Counter = 0..........................................................................296
Section 10 16-Bit Timer Pulse Unit (TPU)
Figure 10.1 Block Diagram of TPU ..........................................................................................376
Figure 10.2 Example of Counter Operation Setting Procedure.................................................411
Figure 10.3 Free-Running Counter Operation...........................................................................412
Figure 10.4 Periodic Counter Operation ...................................................................................413
Figure 10.5 Example of Setting Procedure for Waveform Output by Compare Match ............413
Figure 10.6 Example of 0 Output/1 Output Operation..............................................................414
Figure 10.7 Example of Toggle Output Operation....................................................................414
Figure 10.8 Example of Setting Procedure for Input Capture Operation ..................................415
Figure 10.9 Example of Input Capture Operation .....................................................................416
Figure 10.10 Example of Synchronous Operation Setting Procedure.........................................417
Figure 10.11 Example of Synchronous Operation ......................................................................418
Figure 10.12 Compare Match Buffer Operation .........................................................................419
Figure 10.13 Input Capture Buffer Operation .............................................................................419
Figure 10.14 Example of Buffer Operation Setting Procedure ...................................................420
Figure 10.15 Example of Buffer Operation (1) ...........................................................................421
Figure 10.16 Example of Buffer Operation (2) ...........................................................................422
Figure 10.17 Cascaded Operation Setting Procedure..................................................................423
Figure 10.18 Example of Cascaded Operation (1) ......................................................................423
Figure 10.19 Example of Cascaded Operation (2) ......................................................................424
Figure 10.20 Example of PWM Mode Setting Procedure...........................................................426
Figure 10.21 Example of PWM Mode Operation (1)..................................................................427
Figure 10.22 Example of PWM Mode Operation (2)..................................................................427
Figure 10.23 Example of PWM Mode Operation (3)..................................................................428
Figure 10.24 Example of Phase Counting Mode Setting Procedure ...........................................429
Figure 10.25 Example of Phase Counting Mode 1 Operation.....................................................430
Figure 10.26 Example of Phase Counting Mode 2 Operation.....................................................431
Figure 10.27 Example of Phase Counting Mode 3 Operation.....................................................432
Figure 10.28 Example of Phase Counting Mode 4 Operation.....................................................433
Figure 10.29 Phase Counting Mode Application Example .........................................................434
Figure 10.30 Count Timing in Internal Clock Operation ............................................................438
Figure 10.31 Count Timing in External Clock Operation ...........................................................438
Figure 10.32 Output Compare Output Timing ............................................................................439
Figure 10.33 Input Capture Input Signal Timing ........................................................................439
Figure 10.34 Counter Clear Timing (Compare Match) ...............................................................440
Figure 10.35 Counter Clear Timing (Input Capture)...................................................................440
Figure 10.36 Buffer Operation Timing (Compare Match) ..........................................................440
Figure 10.37 Buffer Operation Timing (Input Capture)..............................................................441
Figure 10.38 TGI Interrupt Timing (Compare Match)................................................................441
Rev. 2.00, 05/03, page xli of lii