One address is specified by MAR, and the other is set automatically to the data transfer
acknowledge pin (DACK). The transfer direction can be specified by the DTDIR bit in DMACR.
Table 7.8 summarizes register functions in single address mode.
Table 7.8
Register Functions in Single Address Mode
Register
23
MAR
DACK pin
15
ETCR
MAR specifies the start address of the transfer source or transfer destination as 24 bits. IOAR is
invalid; in its place the strobe for external devices (DACK) is output.
Figure 7.9 illustrates operation in single address mode (when sequential mode is specified).
Rev. 2.00, 05/03, page 238 of 820
Function
DTDIR = 0 DTDIR = 1 Initial Setting
0
Source
Destination
address
address
register
register
Write
Read
strobe
strobe
0
Transfer counter
Start address of
transfer destination
or transfer source
(Set automatically
by SAE bit; IOAR is
invalid)
Number of transfers See sections 7.5.2,
Operation
See sections 7.5.2,
Sequential Mode,
7.5.3, Idle Mode,
and 7.5.4, Repeat
Mode.
Strobe for external
device
Sequential Mode,
7.5.3, Idle Mode,
and 7.5.4, Repeat
Mode.