Ppg Output Mode Register (Pmr) - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
Table of Contents

Advertisement

Bit
Bit Name
1
G0CMS1
0
G0CMS0
11.3.5

PPG Output Mode Register (PMR)

PMR selects the pulse output mode of the PPG for each group. If inverted output is selected, a
low-level pulse is output when PODRH is 1 and a high-level pulse is output when PODRH is 0. If
non-overlapping operation is selected, PPG updates its output values at compare match A or B of
the TPU that becomes the output trigger. For details, refer to section 11.4.4, Non-Overlapping
Pulse Output.
Bit
Bit Name
7
G3INV
6
G2INV
5
G1INV
4
G0INV
Initial Value
R/W
1
R/W
1
R/W
Initial Value
R/W
1
R/W
1
R/W
1
R/W
1
R/W
Description
Group 0 Compare Match Select 1 and 0
Select output trigger of pulse output group 0.
00: Compare match in TPU channel 0
01: Compare match in TPU channel 1
10: Compare match in TPU channel 2
11: Compare match in TPU channel 3
Description
Group 3 Inversion
Selects direct output or inverted output for pulse
output group 3.
0: Inverted output
1: Direct output
Group 2 Inversion
Selects direct output or inverted output for pulse
output group 2.
0: Inverted output
1: Direct output
Group 1 Inversion
Selects direct output or inverted output for pulse
output group 1.
0: Inverted output
1: Direct output
Group 0 Inversion
Selects direct output or inverted output for pulse
output group 0.
0: Inverted output
1: Direct output
Rev. 2.00, 05/03, page 461 of 820

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s seriesH8s/2300 series

Table of Contents