Table 10.5 Tpsc2 To Tpsc0 (Channel 0); Table 10.6 Tpsc2 To Tpsc0 (Channel 1) - Renesas H8S/2368 Series Hardware Manual

Table 10.5 TPSC2 to TPSC0 (Channel 0)

Bit 2
Channel TPSC2
0 0
1

Table 10.6 TPSC2 to TPSC0 (Channel 1)

Bit 2
Channel TPSC2
1 0
1
Note: This setting is ignored when channel 1 is in phase counting mode.
Rev. 2.00, 05/03, page 382 of 820
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Description
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
External clock: counts on TCLKD pin input
Description
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on φ/256
Counts on TCNT2 overflow/underflow