Instruction Set; Table 2.1 - Renesas H8S/2368 Series Hardware Manual

2.6

Instruction Set

The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function as
shown in table 2.1.

Table 2.1

Instruction Classification
Function Instructions
Data transfer MOV
POP*
LDM, STM
MOVFPE*
Arithmetic ADD, SUB, CMP, NEG
operations
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS*
Logic operations AND, OR, XOR, NOT
Shift SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL,
ROTXR
Bit manipulation BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST, BAND,
BIAND, BOR, BIOR, BXOR, BIXOR
Branch B
System control TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC,
NOP
Block data transfer EEPMOV
Notes: B: Byte size; W: Word size; L: Longword size.
*1 POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn, @-
SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and MOV.L ERn,
@-SP.
*2 BCC is the general name for conditional branch instructions.
*3 Cannot be used in this LSI.
*4 Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
1 1
, PUSH*
3
, MOVTPE*
4
2
, JMP, BSR, JSR, RTS
*
CC
3
Size
B/W/L
W/L
L
B
B/W/L
B
B/W/L
L
B/W
W/L
B
B/W/L
B/W/L
B
–
–
–
Rev. 2.00, 05/03, page 37 of 820
Types
5
19
4
8
14
5
9
1
Total: 65