Contention Between Tcor Write And Compare Match; Figure 12.11 Contention Between Tcnt Write And Increment - Renesas H8S/2368 Series Hardware Manual

φ
Address
Internal write signal
TCNT input clock
TCNT

Figure 12.11 Contention between TCNT Write and Increment

12.8.3

Contention between TCOR Write and Compare Match

During the T state of a TCOR write cycle, the TCOR write has priority and the compare match
2
signal is inhibited even if a compare match event occurs as shown in figure 12.12.
TCNT write cycle by CPU
T T
1
TCNT address
N
2
M
Counter write data
Rev. 2.00, 05/03, page 489 of 820