Figure 6.38 Self-Refresh Timing - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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Software
standby
T
T
T
Rp
Rr
Rc3
(
)
,
High
(
)
Note: n = 2, 3

Figure 6.38 Self-Refresh Timing

In some DRAMs provided with a self-refresh mode, the RAS signal precharge time immediately
after self-refreshing is longer than the normal precharge time. A setting can be made in bits
TPCS2 to TPCS0 in REFCR to make the precharge time immediately after self-refreshing from 1
to 7 states longer than the normal precharge time. In this case, too, normal precharging is
performed according to the setting of bits TPC1 and TPC0 in DRACCR, and therefore a setting
should be made to give the optimum post-self-refresh precharge time, including this time. Figure
6.39 shows an example of the timing when the precharge time immediately after self-refreshing is
extended by 2 states.
Rev. 2.00, 05/03, page 172 of 820

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