Section 20 Mask Rom; Figure 20.1 Block Diagram Of 256-Kbyte Mask Rom (Hd6432365) - Renesas H8S/2368 Series Hardware Manual

The LSI of this series has 256 kbytes of mask ROM. The on-chip ROM is connected to the CPU,
data transfer controller (DTC), and DMA controller (DMAC)* with a 16-bit data bus. The on-chip
ROM can be accessed by the CPU, DTC, and DMAC in 8 or 16-bit units. The data in the on-chip
ROM can always be accessed in one state.

Figure 20.1 Block Diagram of 256-kbyte Mask ROM (HD6432365)

The on-chip ROM is enabled or disabled according to the operating mode. The operating mode is
selected by the mode setting pins MD2 to MD0 as shown in table 3.1. Select mode 4 or 7 when the
on-chip ROM is used, and mode 1 or 2 when the on-chip ROM is not used. The on-chip ROM is
allocated in area 0.
Note: * Not supported by the H8S/2366.

Section 20 Mask ROM

Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
H'000000
H'000002
H'03FFFE
H'000001
H'000003
H'03FFFF
Rev. 2.00, 05/03, page 673 of 820