Figure 6.26 Example Of Wait State Insertion Timing (3-State Column Address Output) - Renesas H8S/2368 Series Hardware Manual

Address bus
(
,
(
Read
( )
Data bus
,
(
Write
( )
Data bus
Notes: Downward arrows indicate the timing of
n = 2, 3
Rev. 2.00, 05/03, page 162 of 820
T T
p r
Row address
)
)
)
Figure 6.26 Example of Wait State Insertion Timing
(3-State Column Address Output)
By program wait
T T
c1 w
Column address
High
High
pin sampling.
By pin
T T T
w c2 c3