Register Bits - Renesas H8S/2368 Series Hardware Manual

Item

23.2 Register Bits

23.3 Register States in
Each Operating Mode
Rev. 2.00, 05/03, page xvi of lii
Page Revision (See Manual for Details)
710 Table amended.
Register
Name Bit 7
—
CRA
—
—
CRB
—
ICCRA_0 ICE
ICCRB_0 BBSY
ICCRA_1 ICE
ICCRB_1 BBSY
716 *1 deleted after DTC module
(Error) DTC *
717 Table amended.
Register
Bit 7
Name
DTVECR SWDTE
INTCR —
IER —
IRQ7E
ISR —
IRQ7F
SBYCR SSBY
SCKCR PSTOP
SYSCR —
725 Table amended.
Register
Reset
Name
TDR_3 Initialized
SSR_3 Initialized
RDR_3 Initialized
TDR_4 Initialized
SSR_4 Initialized
RDR_4 Initialized
726 Register name amended and deleted.
(Error) DRACCRH → (Correction) DRACCR
DRACCRL deleted.
728 Table amended.
Register
Reset
Name
PORT1
—
PORT2
—
PORT3
—
PORT4
—
PORT5
—
PORT8
—
PORT9
—
PORTA
—
PORTB
—
PORTC
—
PORTD
—
PORTE
—
PORTF
—
PORTG
—
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
— — — — —
— — — — —
— — — — —
— — — — —
RCVD MST TRS CKS3 CKS2
SCP SDAO — SCLO —
RCVD MST TRS CKS3 CKS2
SCP SDAO — SCLO —
→ (Correction) DTC
1
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
DTVEC6 DTVEC5 DTVEC4 DTVEC3 DTVEC2
— INTM1 INTM0 NMIEG —
— — — — —
IRQ6E IRQ5E IRQ4E IRQ3E IRQ2E
— — — — —
IRQ6F IRQ5F IRQ4F IRQ3F IRQ2F
OPE — — STS3 STS2
— — — STCS SCK2
— — — FLSHE —
High- Clock Module All Module
Division Sleep
Speed Stop Clock Stop
— — — Initialized Initialized
—
— — Initialized Initialized
—
— — Initialized Initialized
— — — Initialized Initialized
—
— — Initialized Initialized
— — — Initialized Initialized
Clock Module All Module
High-
Division Sleep Stop Clock Stop
Speed
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
— — — — —
Bit 1 Bit 0 Module
— —
— —
— —
— —
CKS1 CKS0 IIC2_0
IICRST —
CKS1 CKS0 IIC2_1
IICRST —
Bit 1 Bit 0 Module
DTVEC1 DTVEC0 DTC
— — INT
— —
IRQ1E IRQ0E
— —
IRQ1F IRQ0F
STS1 STS0 SYSTEM
SCK1 SCK0
EXPE RAME
Software Hardware
Module
Standby Standby
SCI_3
Initialized Initialized
Initialized Initialized
Initialized Initialized
SCI_4
Initialized Initialized
Initialized Initialized
Initialized Initialized
Software Hardware
Standby Standby Module
— — PORT
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —
— —