Flash Memory Control Register 2 (Flmcr2); Erase Block Register 1 (Ebr1) - Renesas H8S/2368 Series Hardware Manual

Bit Bit Name
0 P
19.5.2

Flash Memory Control Register 2 (FLMCR2)

FLMCR2 is a register that displays the state of flash memory programming/erasing. When the
SWE bit in FLMCR1 is cleared to 0, FLMCR2 is initialized to H'00. FLMCR2 is a read-only
register, and should not be written to.
Bit Bit Name
7 FLER
6 —
to
0
19.5.3

Erase Block Register 1 (EBR1)

EBR1 specifies the flash memory erase area block. EBR1 is initialized to H'00 when the SWE bit
in FLMCR1 is 0. Set only one bit in EBR1 and EBR2 together (do not set more than one bit at the
same time). Setting more than one bit will automatically clear all EBR1 and EBR2 bits to 0. For
details, see table 19.3.
Rev. 2.00, 05/03, page 654 of 820
Initial Value R/W
0 R/W
Initial Value R/W
0 R
0 R
Description
Program
When this bit is set to 1 while SWE = 1, and PSU =
1, the flash memory transits to program mode.
When it is cleared to 0, program mode is cancelled.
Description
Indicates that an error has occurred during an
operation on flash memory (programming or
erasing). When FLER is set to 1, flash memory
goes to the error-protection state.
See section 19.9.3, Error Protection, for details.
Reserved
These bits always read 0.