Figure 24.25 Dmac Single Address Transfer Timing: Three-State Access; Figure 24.26 Dmac Tend Output Timing - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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A23 to A0
to
(read)
D15 to D0
(read)
,
(write)
D15 to D0
(write)
,

Figure 24.25 DMAC Single Address Transfer Timing: Three-State Access

,
Figure 24.26 DMAC TEND
T
T
1
2
t
DACD1
T
T
or T
1
2
t
TED
TEND Output Timing
TEND
TEND
Rev. 2.00, 05/03, page 761 of 820
t
DACD2
3
t
TED

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