• P21/PO1*
1
/TIOCB3/TMRI1
The pin function is switched as shown below according to the combination of the TPU channel
3 settings (by bits MD3 to MD0 in TMDR_3, bits IOB3 to IOB0 in TIORH_3, and bits
CCLR2 to CCLR0 in TCR_3), bit NDER1*
TPU channel 3
settings
P21DDR
1
NDER1*
Pin function
Notes: *1 Not supported by the H8S/2366.
*2 TIOCB3 input when MD3 to MD0 = B'0000 and IOB3 to IOB0 = B'10xx.
*3 When used as the TMR counter reset pin, set both the CCLR1 and CCLR0 bits in
TCR_1 to 1.
TPU channel 3
settings
MD3 to MD0
IOB3 to IOB0
B'0000
B'0100
B'1xxx
CCLR2 to
CCLR0
Output function
x: Don't care
(1) in table below
—
—
TIOCB3 output
(2)
(1)
B'0000
B'0001 to
B'0011
B'0101 to
B'0111
—
—
—
Output
compare
output
1
in NDERL, and bit P21DDR.
(2) in table below
0
—
P21 input
P21 output
TIOCB3 input*
3
TMRI1 input*
(2)
(2)
B'0010
B'0011
—
B'xx00
—
—
—
—
Rev. 2.00, 05/03, page 321 of 820
1
1
0
1
PO1 output*
2
(1)
(2)
Other than B'xx00
Other than
B'010
B'010
PWM mode
—
2 output
1