Figure 14.16 Sample Sci Transmission Operation In Clocked Synchronous Mode - Renesas H8S/2368 Series Hardware Manual

Serial clock
Serial data
TDRE
TEND
TXI interrupt
request generated

Figure 14.16 Sample SCI Transmission Operation in Clocked Synchronous Mode

Transfer direction
Bit 0 Bit 1
Data written to TDR
and TDRE flag
cleared to 0 in TXI
interrupt handling routine
1 frame
Bit 7 Bit 0 Bit 1
TXI interrupt
request generated
Rev. 2.00, 05/03, page 561 of 820
Bit 6 Bit 7
TEI interrupt
request generated