Usage Notes; Module Stop Mode Setting; Permissible Signal Source Impedance; Figure 16.6 Example Of Analog Input Circuit - Renesas H8S/2368 Series Hardware Manual

16.7

Usage Notes

16.7.1

Module Stop Mode Setting

Operation of the A/D converter can be disabled or enabled using the module stop control register.
The initial setting is for operation of the A/D converter to be halted. Register access is enabled by
clearing module stop mode. For details, refer to section 22, Power-Down Modes.
16.7.2

Permissible Signal Source Impedance

This LSI's analog input is designed so that conversion precision is guaranteed for an input signal
for which the signal source impedance is 5 kΩ or less. This specification is provided to enable the
A/D converter's sample-and-hold circuit input capacitance to be charged within the sampling
time; if the sensor output impedance exceeds 5 kΩ, charging may be insufficient and it may not be
possible to guarantee the A/D conversion precision. However, if a large capacitance is provided
externally for conversion in single mode, the input load will essentially comprise only the internal
input resistance of 10 kΩ, and the signal source impedance is ignored. However, since a low-pass
filter effect is obtained in this case, it may not be possible to follow an analog signal with a large
differential coefficient (e.g., 5 mV/µs or greater) (see figure 16.6). When converting a high-speed
analog signal or conversion in scan mode, a low-impedance buffer should be inserted.
Sensor output
impedance
Up to 10 kΩ
Sensor input
Low-pass
filter
C to 0.1 µF
Rev. 2.00, 05/03, page 632 of 820

Figure 16.6 Example of Analog Input Circuit

This LSI
Equivalent circuit of A/D converter
Cin =
15 pF
10 kΩ
20 pF