Figure 6.25 Example Of Wait State Insertion Timing (2-State Column Address Output) - Renesas H8S/2368 Series Hardware Manual

Address bus
( )
,
( )
Read
( )
Data bus
,
( )
Write
( )
Data bus
Notes: Downward arrows indicate the timing of
n = 2, 3
Figure 6.25 Example of Wait State Insertion Timing
By program wait
T T
p r
Row address
High
High
(2-State Column Address Output)
By
T T T
c1 w w
Column address
pin sampling.
Rev. 2.00, 05/03, page 161 of 820
pin
T
c2