Interrupts; Usage Notes; Notes On Register Access; Figure 13.3 Operation In Interval Timer Mode - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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TCNT count
H'FF
H'00
WT/ =0
TME=1
Legend
WOVI: Interval timer interrupt request generation
13.5

Interrupts

During interval timer mode operation, an overflow generates an interval timer interrupt (WOVI).
The interval timer interrupt is requested whenever the OVF flag is set to 1 in TCSR. OVF must be
cleared to 0 in the interrupt handling routine.

Table 13.2 WDT Interrupt Source

Name
Interrupt Source
WOVI
TCNT overflow
13.6

Usage Notes

13.6.1

Notes on Register Access

The watchdog timer's TCNT, TCSR, and RSTCSR registers differ from other registers in being
more difficult to write to. The procedures for writing to and reading these registers are given
below.
Writing to TCNT, TCSR, and RSTCSR
TCNT and TCSR must be written to by a word transfer instruction. They cannot be written to by a
byte transfer instruction.
TCNT and TCSR both have the same write address. Therefore, satisfy the relative condition
shown in figure 13.4 to write to TCNT or TCSR. The transfer instruction writes the lower byte
data to TCNT or TCSR according to the satisfied condition.
Rev. 2.00, 05/03, page 502 of 820
Overflow
Overflow
WOVI

Figure 13.3 Operation in Interval Timer Mode

Overflow
WOVI
WOVI
Interrupt Flag
OVF
Overflow
Time
WOVI
DTC Activation
Impossible

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