Inverted Pulse Output; Figure 11.10 Inverted Pulse Output (Example) - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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4. Four-phase complementary non-overlapping pulse output can be obtained subsequently by
writing H'59, H'56, H'95... at successive TGIA interrupts.
If the DTC or DMAC is set for activation by the TGIA interrupt, pulse output can be obtained
without imposing a load on the CPU.
11.4.7

Inverted Pulse Output

If the G3INV, G2INV, G1INV, and G0INV bits in PMR are cleared to 0, values that are the
inverse of the PODR contents can be output.
Figure 11.10 shows the outputs when G3INV and G2INV are cleared to 0, in addition to the
settings of figure 11.9.
TCNT value
TGRB
TCNT
TGRA
H'0000
NDRH
95
PODRL
00
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8
65
59
95
05
65
41

Figure 11.10 Inverted Pulse Output (Example)

56
95
59
50
56
14
Rev. 2.00, 05/03, page 471 of 820
65
95
05
65
Time

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