Figure 14.7 Sample Serial Transmission Flowchart - Renesas H8S/2368 Series Hardware Manual

Initialization
Start of transmission
Read TDRE flag in SSR
TDRE = 1?
Write transmit data to TDR
and clear TDRE flag in SSR to 0
All data transmitted?
Read TEND flag in SSR
TEND = 1?
Break output?
Clear DR to 0 and
set DDR to 1
Clear TE bit in SCR to 0
Rev. 2.00, 05/03, page 546 of 820
No
Yes
No
Yes
No
Yes
No
Yes
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Figure 14.7 Sample Serial Transmission Flowchart

[1] SCI initialization:
[1]
The TxD pin is automatically
designated as the transmit data
output pin.
After the TE bit is set to 1, a frame
of 1s is output, and transmission is
[2]
enabled.
[2] SCI status check and transmit data
write:
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR and clear the
TDRE flag to 0.
[3] Serial transmission continuation
procedure:
To continue serial transmission,
read 1 from the TDRE flag to
confirm that writing is possible,
then write data to TDR, and then
clear the TDRE flag to 0. Checking
[3]
and clearing of the TDRE flag is
automatic when the DMAC* or
DTC is activated by a transmit-
data-empty interrupt (TXI) request,
and data is written to TDR.
[4] Break output at the end of serial
transmission:
To output a break in serial
[4]
transmission, set DDR for the port
corresponding to the TxD pin to 1,
clear DR to 0, then clear the TE bit
in SCR to 0.
Note: * Not supported by the H8S/2366.