Section 18 Ram - Renesas H8S/2368 Series Hardware Manual

This LSI has an on-chip high-speed static RAM. The RAM is connected to the CPU by a 16-bit
data bus, enabling one-state access by the CPU to both byte data and word data.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on the system control register (SYSCR), refer to section 3.2.2,
System Control Register (SYSCR).
Product Type Name
H8S/2368 HD64F2367
Group
HD64F2366
HD6432365
HD641363

Section 18 RAM

ROM Type
Flash memory version
Masked ROM version
ROMless version
RAM
Capacitance RAM Address
24 kbytes H'FF6000 to H'FFBFFF
30 kbytes H'FF4800 to H'FFBFFF
16 kbytes H'FF8000 to H'FFBFFF
Rev. 2.00, 05/03, page 643 of 820