Table 10.9 Tpsc2 To Tpsc0 (Channel 4); Table 10.10 Tpsc2 To Tpsc0 (Channel 5) - Renesas H8S/2368 Series Hardware Manual

Table 10.9 TPSC2 to TPSC0 (Channel 4)

Bit 2
Channel TPSC2
4 0
1
Note: This setting is ignored when channel 4 is in phase counting mode.

Table 10.10 TPSC2 to TPSC0 (Channel 5)

Bit 2
Channel TPSC2
5 0
1
Note: This setting is ignored when channel 5 is in phase counting mode.
Rev. 2.00, 05/03, page 384 of 820
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Bit 1 Bit 0
TPSC1 TPSC0
0 0
1
1 0
1
0 0
1
1 0
1
Description
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKC pin input
Internal clock: counts on φ/1024
Counts on TCNT5 overflow/underflow
Description
Internal clock: counts on φ/1
Internal clock: counts on φ/4
Internal clock: counts on φ/16
Internal clock: counts on φ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKC pin input
Internal clock: counts on φ/256
External clock: counts on TCLKD pin input