Port 3 Data Register (P3Dr); Port 3 Register (Port3) - Renesas H8S/2368 Series Hardware Manual

9.3.2

Port 3 Data Register (P3DR)

P3DR stores output data for the port 3 pins.
Bit Bit Name Initial Value
7 — 0
6 — 0
5 P35DR 0
4 P34DR 0
3 P33DR 0
2 P32DR 0
1 P31DR 0
0 P30DR 0
9.3.3

Port 3 Register (PORT3)

PORT3 shows the pin states.
PORT3 cannot be modified.
Bit Bit Name Initial Value
7 — 0
6 — 0
5 P35 —*
4 P34 —*
3 P33 —*
2 P32 —*
1 P31 —*
0 P30 —*
Note: * Determined by the states of pins P35 to P30.
Rev. 2.00, 05/03, page 324 of 820
R/W Description
— Reserved
These bits are always read as 0 and cannot be
—
modified.
R/W Output data for a pin is stored when the pin function
is specified to a general purpose I/O.
R/W
R/W
R/W
R/W
R/W
R/W Description
— Reserved
These bits are always read as 0 and cannot be
—
modified.
R If a port 3 read is performed while P3DDR bits are
set to 1, the P3DR values are read. If a port 1 read is
R
performed while P3DDR bits are cleared to 0, the pin
R
states are read.
R
R
R