Write Data Buffer Function; Figure 7.32 Example Of Dual Address Transfer Using Write Data Buffer Function - Renesas H8S/2368 Series Hardware Manual

7.5.11

Write Data Buffer Function

DMAC internal-to-external dual address transfers and single address transfers can be executed at
high speed using the write data buffer function, enabling system throughput to be improved.
When the WDBE bit of BCR in the bus controller is set to 1, enabling the write data buffer
function, external write cycles in dual address transfers or single address transfers are executed in
parallel with internal accesses (on-chip memory or internal I/O registers). Internal accesses are
independent of the bus master, and DMAC dead cycles are regarded as internal accesses.
A low level can always be output from the TEND pin if the bus cycle in which a low level is to be
output from the TEND pin is an external bus cycle. However, a low level is not output from the
TEND pin if the bus cycle in which a low level is to be output from the TEND pin is an internal
bus cycle, and an external write cycle is executed in parallel with this cycle.
Figure 7.32 shows an example of dual address transfer using the write data buffer function. In this
example, burst mode transfer from on-chip RAM to external memory is performed.
Internal address
Internal read signal
External address
,

Figure 7.32 Example of Dual Address Transfer Using Write Data Buffer Function

Figure 7.33 shows an example of single address transfer using the write data buffer function. In
this example, the CPU program area is in on-chip memory.
DMA DMA DMA DMA
read write read write
DMA DMA DMA
read write read
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DMA DMA
write dead