Example Of Normal Pulse Output (Example Of Five-Phase Pulse Output); Figure 11.5 Normal Pulse Output Example (Five-Phase Pulse Output) - Renesas H8S/2368 Series Hardware Manual

11.4.3

Example of Normal Pulse Output (Example of Five-Phase Pulse Output)

Figure 11.5 shows an example in which pulse output is used for cyclic five-phase pulse output.
TCNT value
TCNT
TGRA
H'0000
NDRH 80 C0
PODRH 00 80
PO15
PO14
PO13
PO12
PO11

Figure 11.5 Normal Pulse Output Example (Five-Phase Pulse Output)

1. Set up TGRA in TPU which is used as the output trigger to be an output compare register. Set
a cycle in TGRA so the counter will be cleared by compare match A. Set the TGIEA bit in
TIER to 1 to enable the compare match/input capture A (TGIA) interrupt.
2. Write H'F8 in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
3. The timer counter in the TPU channel starts. When compare match A occurs, the NDRH
contents are transferred to PODRH and output. The TGIA interrupt handling routine writes the
next output data (H'C0) in NDRH.
4. Five-phase pulse output (one or two phases active at a time) can be obtained subsequently by
writing H'40, H'60, H'20, H'30, H'10, H'18, H'08, H'88... at successive TGIA interrupts.
If the DTC or DMAC is set for activation by the TGIA interrupt, pulse output can be obtained
without imposing a load on the CPU.
Rev. 2.00, 05/03, page 466 of 820
Compare match
40 60 20 30
C0 40 60 20
10 18 08 88
30 10 18 08
Time
80 C0 40
88 80 C0