Figure 5.3 Flowchart Of Procedure Up To Interrupt Acceptance - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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Figure 5.3 Flowchart of Procedure Up to Interrupt Acceptance

Rev. 2.00, 05/03, page 98 of 820
Program execution status
Interrupt generated?
Yes
NMI
I = 0
No
IRQ0
Yes
IRQ1
Save PC and CCR
I ← 1
Read vector address
Branch to interrupt handling routine
in Interrupt Control Mode 0
No
Yes
No
No
Yes
No
Yes
IICI1
Yes
Hold
pending

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