Effective Address Calculation; Figure 2.12 Branch Address Specification In Memory Indirect Addressing Mode - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
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In normal mode, the memory operand is a word operand and the branch address is 16 bits long. In
advanced mode, the memory operand is a longword operand, the first byte of which is assumed to
be 0 (H'00).
Note that the top area of the address range in which the branch address is stored is also used for the
exception vector area. For further details, refer to section 4, Exception Handling.
If an odd address is specified in word or longword memory access, or as a branch address, the least
significant bit is regarded as 0, causing data to be accessed or the instruction code to be fetched at
the address preceding the specified address. (For further information, see section 2.5.2, Memory
Data Formats.)
Specified
by @aa:8
Note: * For this LSI, normal mode is not available.

Figure 2.12 Branch Address Specification in Memory Indirect Addressing Mode

2.7.9

Effective Address Calculation

Table 2.13 indicates how effective addresses are calculated in each addressing mode. In normal
mode, the upper 8 bits of the effective address are ignored in order to generate a 16-bit address.
Branch address
(a) Normal Mode
*
Specified
Reserved
by @aa:8
Branch address
(b) Advanced Mode
Rev. 2.00, 05/03, page 51 of 820

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