Renesas H8S/2368 Series Hardware Manual page 176

Bit Bit Name
10 RMTS2
9 RMTS1
8 RMTS0
7 BE
Rev. 2.00, 05/03, page 124 of 820
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
DRAM Space Select
These bits designate DRAM space for areas 2
to 5.
When continuous DRAM space is set, it is
possible to connect large-capacity DRAM
exceeding 2 Mbytes per area. In this case, the
RAS signal is output from the CS2 pin.
000: Normal space
001: Normal space in areas 3 to 5
DRAM space in area 2
010: Normal space in areas 4 and 5
DRAM space in areas 2 and 3
011: Reserved (setting prohibited)
100: Reserved (setting prohibited)
101: Reserved (setting prohibited)
110: Reserved (setting prohibited)
111: Continuous DRAM space in areas 2 to 5
Burst Access Enable
Selects enabling or disabling of burst access to
areas designated as DRAM space. DRAM
space burst access is performed in fast page
mode. When using EDO page mode DRAM, the
OE signal must be connected.
0: Full access
1: Access in fast page mode