Table 24.19 Bus Timing (1) - Renesas H8S/2368 Series Hardware Manual

(3) Bus Timing

Table 24.19 Bus Timing (1)

Conditions: V = 3.0 V to 3.6 V, AV
CC
φ = 8 MHz to 33 MHz, T
T = –40°C to +85°C (wide-range specifications)
a
Item
Address delay time
Address setup time 1
Address setup time 2
Address setup time 3
Address setup time 4
Address hold time 1
Address hold time 2
Address hold time 3
CS delay time 1
CS delay time 2*
CS delay time 3*
AS delay time
RD delay time 1
RD delay time 2
Read data setup time 1
Read data setup time 2
Read data hold time 1
Read data hold time 2
Read data access time 1*
Read data access time 2
Read data access time 3*
Read data access time 4
Read data access time 5
Read data access time 6
Read data access time 7*
Read data access time 8
Address read data access time 1
Address read data access time 2
Address read data access time 3
Address read data access time 4
Address read data access time 5
Note: * Not supported by the H8S/2366.
= 3.0 V to 3.6 V, V
CC
= –20°C to +75°C (regular specifications),
a
Symbol Min
t —
AD
0.5 × t
t
– 13
AS1
cyc
1.0 × t
t
– 13
AS2
cyc
1.5 × t
t
– 13
AS3
cyc
2.0 × t
t
– 13
AS4
cyc
0.5 × t
t
– 8
AH1
cyc
1.0 × t
t
– 8
AH2
cyc
1.5 × t
t
– 8
AH3
cyc
t —
CSD1
t —
CSD2
t —
CSD3
t —
ASD
t —
RSD1
t —
RSD2
t 15
RDS1
t 15
RDS2
t 0
RDH1
t 0
RDH2
t —
AC1
t —
AC2
t —
AC3
t —
AC4
t —
AC5
t —
AC6
t —
AC7
t —
AC8
t —
AA1
t —
AA2
t —
AA3
t —
AA4
t —
AA5
= 3.0 V to AV , V
ref CC
Max Unit
20 ns
— ns
— ns
— ns
— ns
— ns
— ns
— ns
15 ns
15 ns
20 ns
15 ns
15 ns
15 ns
— ns
— ns
— ns
— ns
1.0 × t
ns
– 20
cyc
1.5 × t
ns
– 20
cyc
2.0 × t
ns
– 20
cyc
2.5 × t
ns
– 20
cyc
1.0 × t
ns
– 20
cyc
2.0 × t
ns
– 20
cyc
4.0 × t
ns
– 20
cyc
3.0 × t
ns
– 20
cyc
1.0 × t
ns
– 20
cyc
1.5 × t
ns
– 20
cyc
2.0 × t
ns
– 20
cyc
2.5 × t
ns
– 20
cyc
3.0 × t
ns
– 20
cyc
Rev. 2.00, 05/03, page 775 of 820
= AV = 0 V,
SS SS
Test Conditions
Figures 24.6 to
24.19