Figure 11.9 Non-Overlapping Pulse Output Example (Four-Phase Complementary) - Renesas H8S/2368 Series Hardware Manual

TCNT value
TGRB
TCNT
TGRA
H'0000
NDRH
95
PODRH
00
PO15
PO14
PO13
PO12
PO11
PO10
PO9
PO8

Figure 11.9 Non-Overlapping Pulse Output Example (Four-Phase Complementary)

1. Set up the TPU channel to be used as the output trigger channel so that TGRA and TGRB are
output compare registers. Set the trigger period in TGRB and the non-overlap margin in
TGRA, and set the counter to be cleared by compare match B. Set the TGIEA bit in TIER to 1
to enable the TGIA interrupt.
2. Write H'FF in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Set the G3NOV and G2NOV bits in PMR to 1 to select non-overlapping output.
Write output data H'95 in NDRH.
3. The timer counter in the TPU channel starts. When a compare match with TGRB occurs,
outputs change from 1 to 0. When a compare match with TGRA occurs, outputs change from 0
to 1 (the change from 0 to 1 is delayed by the value set in TGRA). The TGIA interrupt
handling routine writes the next output data (H'65) in NDRH.
Rev. 2.00, 05/03, page 470 of 820
65 59
95 05 65 41
Non-overlap margin
56 95
59 50 56 14
65
95 05 65
Time