Figure 14.9 Sample Serial Reception Data Flowchart (1) - Renesas H8S/2368 Series Hardware Manual

Initialization
Start of reception
Read ORER, PER, and
FER flags in SSR
PER FER
Read RDRF flag in SSR
No
RDRF = 1?
Read receive data in RDR, and
clear RDRF flag in SSR to 0
No
All data received?
Clear RE bit in SCR to 0
<End>

Figure 14.9 Sample Serial Reception Data Flowchart (1)

[1]
[2]
Yes
ORER = 1?
No
Error handling
(Continued on next page)
[4]
Yes
[5]
Yes
[1]
SCI initialization:
The RxD pin is automatically
designated as the receive data
input pin.
[2] [3] Receive error handling and
break detection:
If a receive error occurs, read the
ORER, PER, and FER flags in
SSR to identify the error. After
performing the appropriate error
processing, ensure that the
ORER, PER, and FER flags are
[3]
all cleared to 0. Reception cannot
be resumed if any of these flags
are set to 1. In the case of a
framing error, a break can be
detected by reading the value of
the input port corresponding to
the RxD pin.
[4] SCI status check and receive
data read :
Read SSR and check that RDRF
= 1, then read the receive data in
RDR and clear the RDRF flag to
0. Transition of the RDRF flag
from 0 to 1 can also be identified
by an RXI interrupt.
[5]
Serial reception continuation
procedure:
To continue serial reception,
before the stop bit for the current
frame is received, read the
RDRF flag, read RDR, and clear
the RDRF flag to 0. The RDRF
flag is cleared automatically
when the DMAC* or DTC is
activated by an RXI interrupt and
the RDR value is read.
Note: * Not supported by the H8S/2366.
Rev. 2.00, 05/03, page 549 of 820