•
P34/SCK0/SCK4/SDA0
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
2
of I
C_0, bit C/A in SMR, bits CKE0 and CKE1 in SCR, and bit P34DDR.
ICE
CKE1
C/A
CKE0
P34DDR
Pin function
Notes: *1 NMOS open-drain output when P34ODR = 1.
*2 NMOS open-drain output regardless of P34ODR
*3 Simultaneous output of SCK0 and SCK4 cannot be set.
•
P33/RxD1/SCL1
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
2
of I
C_0, bit RE in SCR of SCI_1 and bit P33DDR.
ICE
RE
P33DDR
Pin function
Notes: *1 NMOS open-drain output when P33ODR = 1.
*2 NMOS open-drain output regardless of P33ODR
•
P32/RxD0/IrRxD/SDA1
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
2
of I
C_0, bit RE in SCR of SCI_0 and bit P32DDR.
ICE
RE
P32DDR
Pin function
Notes: *1 NMOS open-drain output when P32ODR = 1.
*2 NMOS open-drain output regardless of P32ODR
Rev. 2.00, 05/03, page 328 of 820
0
0
0
1
P34
P34
1
input
output*
0
0
P33 input
P33 output*
0
0
P32 input
P32 output*
0
0
1
1
—
—
—
SCK0/SCK4
SCK0/SCK4
1
3
output*
output*
*
0
1
1
RxD1 input
0
1
1
RxD0/IrRxD
1
—
—
—
SCK0/SCK4
1
3
input
*
1
—
SCL1 I/O*
1
—
SDA1 I/O*
input
1
—
—
—
—
SDA0
2
I/O*
1
—
—
2
1
—
—
2