Interrupt Signal Timing; Figure 10.37 Buffer Operation Timing (Input Capture); Figure 10.38 Tgi Interrupt Timing (Compare Match) - Renesas H8S/2368 Series Hardware Manual

16-bit single-chip microcomputer
Table of Contents

Advertisement

φ
Input capture
signal
TCNT
TGRA,
TGRB
TGRC,
TGRD

Figure 10.37 Buffer Operation Timing (Input Capture)

10.9.2

Interrupt Signal Timing

TGF Flag Setting Timing in Case of Compare Match: Figure 10.38 shows the timing for
setting of the TGF flag in TSR by compare match occurrence, and the TGI interrupt request signal
timing.
φ
TCNT input
clock
TCNT
TGR
Compare
match signal
TGF flag
TGI interrupt

Figure 10.38 TGI Interrupt Timing (Compare Match)

TGF Flag Setting Timing in Case of Input Capture: Figure 10.39 shows the timing for setting
of the TGF flag in TSR by input capture occurrence, and the TGI interrupt request signal timing.
N
n
N
n
N
N
N + 1
N + 1
Rev. 2.00, 05/03, page 441 of 820
N + 1
N

Advertisement

Table of Contents
loading

This manual is also suitable for:

H8s seriesH8s/2300 series

Table of Contents